Senior AMS Verification Engineer – Istanbul

About the role

We are seeking a Senior AMS Verification Engineer to join our Istanbul team. The role focuses on verification planning and execution for analog mixed‑signal (AMS) blocks and full‑chip designs, collaborating closely with architects and designers.

Key responsibilities

• Lead verification planning and execution at both block and full‑chip levels.
• Collaborate with architects and designers to align verification goals with design intent.
• Drive enhancements in verification methodology while mentoring team members.
• Develop and verify event‑driven models for analog IC components.

Required profile

• MSEE with 10+ years or PhD with 7+ years of verification experience.
• Advanced knowledge of SystemVerilog and UVM methodology.
• Strong understanding of power‑management and related auxiliary circuitry.
• Hands‑on experience with verification tools such as simulation, waveform analysis, automation, coverage collection, and gate‑level simulation.
• Fluent English communication, both written and verbal.

Required skills

• SystemVerilog
• UVM methodology
• Event‑driven modeling
• Simulation and waveform analysis tools
• Coverage collection and gate‑level simulation
• Perl, Python, Tcl scripting